1. Field of the Invention
The present invention relates to a synchronous rectification controller and a controlling method thereof, which is applicable to a switching power converter circuit; in particular, to a predictive synchronous rectification controller and a controlling method thereof.
2. Description of Related Art
It is a common technique in power conversion fields to take advantage of transistor switches in place of diodes for reducing power consumption.
FIG. 1 shows a typical power converting circuit with secondary-side synchronous rectification. A primary-side of the power converting circuit has a PWM controller 11 and a main switch 12. The PWM controller 11 outputs pulse signals to control on/off state of the main switch 12 according to a feedback signal from an isolated feedback device 13. A synchronous rectification switch 15 and a secondary-side synchronous rectification controller 20 are located at the secondary-side of the power converting circuit. The synchronous rectification controller 20 controls the on/off state of the synchronous rectification switch 15 according to a signal from a secondary-side winding 142 of the transformer 14.
When the main switch 12 is turned on, a direct current (DC) input terminal VIN supplies electric power to the primary-side winding 141 of the transformer 14. Meanwhile, the synchronous rectification switch 15 is turned off. Hence, the electric power coming from the DC input terminal VIN is stored in the transformer 14. Afterwards, as the main switch 12 is turned off, the synchronous rectification controller 20 at the secondary side detects a polarity change at the secondary-side winding 142, and turns on the synchronous rectification switch 15. At this time, the transformer 14 starts releasing the stored energy to an output terminal VO and a filtering capacitor 16.
The synchronous rectification controller 20 at the secondary side has to precisely control a duty cycle of the synchronous rectification switch 15 to simulate the operation of a diode in order to reduce transforming loss and prevent the burning of the switch. The main switch 12 at the primary side and the synchronous rectification switch 15 at the secondary side have to be turned on alternately. For preventing the conducting periods of the main switch 12 and the synchronous rectification switch 15 overlap, a dead time must be preserved between the conducting period of the main switch 12 and the conducting period of the synchronous rectification switch 15. That is, both the main switch 12 and the synchronous rectification switch 15 are turned off during the dead time.
The synchronous rectification controller 20 at the secondary side in FIG. 1 adopts a complicated digital controlling method to calculate the dead time. As shown in the FIG. 1, the synchronous rectification controller 20 at the secondary side has a clock buffer 22, a digital turn-off controller 24, and an output driver 26.
FIG. 2 is a block diagram of the digital turn-off controller 24 in FIG. 1. As shown in FIG. 2, the digital turn-off controller 24 has an oscillator 242, a first counter 243, a second counter 244, a finite state machine 246 and an output control unit 248. The first counter 243 and the second counter 244 are both the up/down counters. The oscillator 242 generates an internal counting clock signal CLK for the counting of the first counter 243 and the second counter 244. The finite state machine 246 receives an external synchronous signal Sync and controls counting durations for the first counter 243 and the second counter 244. The external synchronous signal Sync is an output signal of the secondary-side winding 142 of the transformer 14.
FIG. 3 is a waveform diagram showing the waveforms of control signals of the digital turn-off controller 24. Please refer to FIG. 2 and FIG. 3 at the same time, when the finite state machine 246 detects a rising edge of the first switching period TS1 of the external synchronous signal Sync, a control signal is sent to the first counter 243 to start an upward counting until the finite state machine 246 detects a rising edge of the second switch period TS2 of the external synchronous signal Sync. Thereafter, the finite state machine 246 controls the first counter 243 to start a downward counting until the finite state machine 246 detects a rising edge of the third switching period TS3. Assuming the first counter 243 counts upwardly to n in the first switching period TS1, when the first counter 243 counts downwardly to n−x, the finite state machine 246 outputs an output turn-off signal to control the output control unit 248 to stop outputting a conducting signal (Namely, a driving signal OUT of a “high” voltage level). The value of x is a predetermined counting number for the dead time, and is configurable by the dead time setting terminal DTS.
Besides, when the finite state machine 246 detects the rising edge of the second switching period TS2 of the external synchronous signal Sync, the finite state machine 246 controls the second counter 243 to start the upward counting until the finite state machine 246 detects the rising edge of the third switching period TS3 of the external synchronous signal Sync. The second counter 243 is operating in a manner similar to that of the first counter 243. In the third switching period TS3, according to the counting number of the second counter 243, the finite state machine 246 outputs a turn-off signal to stop the output control unit 248 from outputting a conducting signal.
The secondary-side synchronous controller 20 utilizes the upward counting and downward counting of the counter 243 and the counter 244 to predict the conducting period of the synchronous rectification switch at the next switching period effectively and maintain a constant dead time. However, the circuit design of the secondary-side synchronous controller 20 is very complicated and its fabricating cost could not be easily reduced.